THE SYNTHESIS OF MEMORY ELEMENTS FOR CMOS CIRCUITS

Kulakova Anastasiya Alekseevna; Lukyanenko E.

doi:doi:10.30987/conferencearticle_5e0282139bcfc0.73318616

THE SYNTHESIS OF MEMORY ELEMENTS FOR CMOS CIRCUITS

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THE SYNTHESIS OF MEMORY ELEMENTS FOR CMOS CIRCUITS

Section: SIMULATION OF ELECTRONIC ELECTROTECHNICAL, PHYSICAL AND RADIO SYSTEMS IN DESIGNING, PRODUCTION, SCIENTIFIC RESEARCHES AND IN THE EDUCATIONAL PROCESS

Proceedings: CAD/EDA, MODELING AND SIMULATION IN MODERN ELECTRONICS: COLLECTION OF SCIENTIFIC PAPERS OF THE III INTERNATIONAL SCIENTIFIC AND PRACTICAL CONFERENCE

UDK 62 Инженерное дело. Техника в целом. Транспорт GRNTI 47.01 Общие вопросы электроники и радиотехники BBK 302 Проектирование

Kulakova Anastasiya Alekseevna ¹

Lukyanenko E. ²

Author and publication information

Authors:

1. Engineering center of instrument making, radio‒ and microelectronics, Southern federal university

2. Engineering center of instrument making, radio‒ and microelectronics, Southern federal university
Russian Federation

Type:

Сonference article

DOI:

https://doi.org/10.30987/conferencearticle_5e0282139bcfc0.73318616

Published:

20.02.2020

Subject area:

UDK 62 Инженерное дело. Техника в целом. Транспорт
GRNTI 47.01 Общие вопросы электроники и радиотехники
BBK 302 Проектирование

Language:

Russian

Keywords:

D–flip-flop, E-flip-flop, JK-flip-flop, standard logic element, power dissipation, performance of the circuit, energy–topological criterion, the circuit simulation

Abstract and keywords

Abstract (English):
Two-stage triggers synthesized on CMOS-transistors are given. Triggers are based on a “weak” latch and a symmetrical control circuit. The results of comparing the above triggers for energy efficiency are presented, revealing the advantages of synthesized elements over circuits based on standard logic elements.

Keywords:
D–flip-flop, E-flip-flop, JK-flip-flop, standard logic element, power dissipation, performance of the circuit, energy–topological criterion, the circuit simulation

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References

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